The communications revolution of the 1990's has led to an explosion of growth in the wireless communications field. Wireless telephones, personal communications services (PCS) handsets, and wireless computer networks are just a few of the products of this revolution. As larger and larger amounts of voice and data communication content are being transmitted by wireless links, there is a greater need for higher transmission rates. Unfortunately, such higher transmission rates are generally constrained by the speed at which data can be encoded and/or decoded both prior to and after transmission via a wireless link.
Different methods for encoding and decoding are currently available. One type of decoding method for decoding convolutionally encoded data that has gained general acceptance is trellis-based decoding, the most well known of which is the Viterbi algorithm. In trellis-based decoding, and in the Viterbi algorithm in particular, multiple encoded sets of binary data are serially processed. However, such processing requires that multiple calculations be made for each encoded set of data. Also, for each set of calculations done, multiple other calculations need to be performed to obtain the metrics or measurements that are to be used in determining the original unencoded bit sequence.
Essentially, calculations have to be made to determine how different each encoded set is from a predetermined group of states or sets of data bits. Then, based on the results of these determinations, the previous or originating state from which each state resulted has to be found. The previous states for each state are then used to trace back the original unencoded set of bits.
These calculations have previously been done serially and, even though high clock speeds have been applied, the throughput of the system has been lacklustre. Also, such high clock speeds are disadvantageous for low power systems.
Based on the above, there is therefore a need for systems or devices which will allow for faster throughput in the calculations involved in trellis-based decoding. Such solutions should also be usable with memory subsystems optimized for trellis-based decoding and should allow for high throughput even at lower clock speeds.